1. Field of the Invention
The present invention relates to a semiconductor memory device having memory cells with floating gates and a method of controlling the threshold voltages of the memory cells.
2. Description of the Related Art
Conventionally, flash memories have been extensively used as nonvolatile semiconductor memories.
The erase operation of the flash memories is performed by drawing electrons out of the floating gates. In the erase operation, a block of memory cells is erased at a time. In this case, there will exist overerased cells the threshold voltages of which have dropped too much lower than a constant lower-limiting value. After electrons have been drawn out of the floating gates, therefore, such processing as makes the threshold voltages of the overerased cells higher than the lower-limiting value is performed. The processing includes self-convergence processing and weak program processing. The self-convergence and the weak program have been proposed in, for example, Japanese Patent Application Publication KOKAI No. 11-66898 and U.S. Pat. No. 5,568,419, respectively.
With conventional flash memories, the threshold voltages of overerased cells are set higher than a constant value through the self-convergence or weak program processing. With the processing methods proposed so far, however, it takes a long time to raise the threshold voltages of the overerased cells. In addition, difficulties may be involved in making the threshold voltages of the overerased cells sufficiently high, in which case semiconductor memory devices are often discarded as faulty chips.